PLC AND HDL LAB DIPLOMA ELECTRICAL AND ELECTRONICS ENGINEERING

Department of Technical Education

DIPLOMA COURSE IN ELECTRICAL AND ELECTRONICS ENGINEERING

Sixth Semester

 

PLC AND HDL LAB

 

                                                           

Contact Hrs / Week : 6                                                         Contact Hrs / Sem : 96 hrs  

 

 

        Note :- This Lab contains 2 parts Part A and Part B.   Both are compulsory. 

 

Part A

Programmable Logic Controller Lab ( PLC Lab)

 

 

   STUDY EXPERIMENTS                                                                               06 HOURS

Note :  The word study here means Physical inspection only.

 

.

01    Study the architecture and working of PLC                                          03

 

i)                    Block diagram of PLC

ii)                  Operation cycle of PLC

iii)                Operation modes of PLC - program, run and test modes.

iv)                Data files and program files.

v)                  List the protocols used for communication.

      

02    Study the following input devices and  output devices                               02

 

i)                    Push button switches

ii)                  Thermal /Temperature sensors/ switches

iii)                Pressure switches

iv)                Float switches

v)                  Magnetic or reed switches

vi)                Limit switches.

vii)              Proximity sensors/switches- optical, capacitive and inductive types.

viii)            Encoders

ix)                Relay

x)                  Contactor

xi)                Solenoid valve.

xii)              Motor

xiii)            Indicators

xiv)            Hooters/Alarms

 

03    Study the following                                                                                        01hr

 

i)                    Configuration of I/Os ,

ii)                  Addressing  I/Os

iii)                Programming Methods.

iv)                Study the wiring of PLC- sourcing and sinking modes.

v)                  Installation of Programming Software and communication driver.

vi)                Connecting PLC, communication cable and programming device. configure and establish communication between them.

vii)              PLC programming  instructions and their application.

 

CONDUCTING EXPERIMENTS.                                                                                                            

 

Develop the ladder program for the following exercises, download and test the same.

 

01. Develop a ladder program for AND, OR, EX-OR, NAND and NOR logic gates.           06

 

a)      Example application of Alarm system:

            If one input is ON, nothing happens

            If any two inputs are ON, a red light turns ON

            If any three inputs are ON, a hooter/alarm turns ON

 

02. Develop a ladder program for DOL starter.                                                                          03

      (connect a push button and activate the input )

 

03. Develop a ladder program for interlocking two motors.                                                  03

   

04. Develop a ladder programs to study ON delay and OFF delay timers.                              

Applications: Develop a ladder program for switching ON motor1,

motor 2 and motor 3 in  sequence with some time delay and turn off

in the same sequence when switched OFF.                                                                          06

      

05. Develop a ladder Program for Star/Delta starter.                                                            03

 

06. Develop a ladder program for water level controller using latch

       and unlatch instruction.(connect Float  Switch and activate the input)                          03   

 

PART B 

Hardware Description Language Lab- ( HDL Lab)

 

 

Note:

Hardware        :           Xilinx / Altera / ALDEC / any other  FPGA board

Software         :           ISE 7.1 with built in Simulator for Xilinx Board

Quartus II for Altera Board

 

The Software is Free under University program .

 

Website                       i)          www.xilinx.com

ii)         www.altera.com

iii)        www.aldec.com         

 

I Introduction to HDL

Defining modules, architecture, structural modeling, conditional modeling, key words and binary words                                                                                                  6

Simulate & download onto FPGA board

 

1) Write VHDL code to realize all the logic gates.                                                    3

 

2)  Design 1-bit adder.  (Hale adder & full adder)                                                     3

 

3) Design a  B C D UP counter                                                                                  3

 

4) Write VHDL code for the following combinational designs                                 3

a)  Decoder                 b) Encoder      .

 

5) Write VHDL code for the following combinational designs                                 3

a)  Multiplexer,            b) De-multiplexer.

 

6) Design a 2-bit ALU.  The ALU should take in 2-bit numbers and have the         6

      following functionality.

 

1)         Add the numbers

2)         Subtract the numbers

3)         NOR the numbers

4)         NAND the numbers

 

The output of the ALU will consist of the 2-bit  result and carry / borrow bit. you are required to write a test bench for this design.

 

7) Develop the VHDL codes for the following flip flops                                          6

SR,      D,        JK and T

 

8) Interfacing  (At least two must be covered)                                                        12

a) Interfacing Relay

b) Interfacing DC motor

c) Interfacing Stepper motor

d)Interfacing ADC

e)Interfacing DAC

f)) Write VHDL code to display messages on the given seven segment display

     and LCD   and accepting .Hex Keypad input data

Ref:

1) Digital system design using VHDL by Charles H. Roth Jr. Thomson learning

2) Circuit Design with VHDL by Volnei A. Pedroni

3) Manufacturer’s Manual.

 

9.    Tests and Revision                                                                                6 Hrs

 

 

Scheme of Evaluation

 

1    Record                                                                                                            5

     

2    Procedure- one from PLC and one from HDL      (15+15)                       30

     

 

3    Conduction and Results    (both)    (20+20)                                                40

 

4    Print out                                                                                                         05

 

5    Viva                                                                                                                20

 

                                                                  TOTAL                                              100

                 

 

 

Equipments List  :-

PLC Lab

  1. PLC Kit
  2. Contactor -  Coil Voltage 415volts/50 hz

                          Main contact – 3 Nos

                          Auxilla4ry contacts – 2 NO + 2 NC                        

2 Timer  ( Electronic )-  4 Nos.

3. Pneumatic  Timer  -    4 Nos.

4. Push button (ON)     -  8 Nos.

5. Push button ( OFF)  -   8 Nos.

6. Brass terminals        -   100 Nos.

7. Different types of Push button Switches

8. Limit Switches

9. Selector Switches

10. Indicators

11.  Over load relays 

HDL Lab :-

VHDL Kit with RS 232 Interface to download hex program to kit. Necessary Software to develop VHDL Program and Downloading software.

Interfacing  kits with VHDL Kit

a) Interfacing Relay

b) Interfacing DC motor

c) Interfacing Stepper motor

d)Interfacing ADC

e)Interfacing DAC

f)) Write VHDL code to display messages on the given seven segment display

     and LCD   and accepting .Hex Keypad input data

 

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